In the field of radio frequency (RF) communication, it is increasingly common for RF receivers to comprise complex analogue to digital converter (ADC) circuitry for converting received signals from an analogue format to a digital format. The use of ADCs minimises analogue baseband filtering and enables improved channel selectivity through the use of digital filtering.
For receivers, such as very low intermediate frequency (VLIF) receivers, a dynamic range in excess of 90 dB, i.e. the ADC digital output can faithfully represent input signals which vary in amplitude by up to 90 dB, is generally required.
The need for such a high dynamic range is a relatively recent development, due to RF receivers migrating to deep sub-micron processes and the use of zero intermediate frequency (ZIF) and VLIF receiver architectures, is leading to increased replacement of analogue filtering by digital filtering in the receiver architecture. To take full advantage of digital filtering requires a high dynamic range ADC.
A need to provide a dynamic range in excess of 90 dB arises due to received RF signals being received at a signal strength as low as −110 dBm, when the receiver needs to distinguish the desired received signal from residual noise. Similarly, it is possible, and indeed generally expected, that interference signals in adjacent RF channels can be up to 50 dB higher in energy than the desired signal. Consequently, a high dynamic range of the receiver is necessary in order for the digital filtering in the RF receiver circuitry to be able to remove the interference signal(s), whilst maintaining a sufficient signal to noise ratio (SNR) for the receiver to be able to adequately recover the desired signal.
It is known that providing such a level of dynamic range involves consuming a significant amount of power to operate the complex ADC, with the power consumed by an ADC and its dynamic range being generally monotonically related. As will be appreciated by a skilled artisan, for battery powered devices, high power consumption is undesirable, since it limits the battery life of the device. Nevertheless, as mentioned above, a high dynamic range is required in order for the digital output to faithfully represent a received input signal, in the presence of high power interfering (blocking) signals or when the desired received signal level is at a very low power.
Thus, a need exists for an improved wireless communication device and integrated circuit providing analogue to digital converter functionality.